P_CAPABILITIES

code: 106

# get
<module-index>/<port-index> P_CAPABILITIES ?

Description

Returns a series of integer values specifying various internal limits of a port.

Actions

get

Parameters

  1. max_speed: integer, maximum wire speed in Mbps, for fastest transceiver and mode. This is L1 Mbps, related to calculating PS_RATEL2BPS and PS_RATEPPS.

  2. max_speed_reduction: integer, maximum ppm value of speed reduction for P_SPEEDREDUCTION.

  3. min_interframe_gap: integer, minimum bytes between frames for P_INTERFRAMEGAP.

  4. max_interframe_gap: integer, maximum explicit bytes between frames for P_INTERFRAMEGAP.

  5. max_preamble: integer, maximum preamble bytes included in frame. Ethernet preamble byte count, include in the IFG byte count.

  6. max_streams_per_port: integer, maximum streams per port. Max length of PS_INDICES: stream_indices, and PS_CREATE max index value.

  7. max_percent: integer, maximum input rate in percent. Maximum incoming traffic rate in percent.

  8. max_pps: integer, maximum input rate in pps. Maximum incoming traffic rate in pps.

  9. max_mbps: integer, maximum input rate in Mbps. Maximum incoming traffic rate in Mbps.

  10. max_seed: integer, maximum random seed for P_RANDOMSEED: seed.

  11. max_tx_packet_limit: integer, maximum stop-after-n-packet limitation for P_TXPACKETLIMIT: packet_count_limit.

  12. max_burst_size: integer, maximum packets per burst for PS_BURST: size.

  13. min_packet_length: integer, minimum bytes in total packet for PS_PACKETLENGTH.

  14. max_packet_length: integer, maximum bytes in total packet for PS_PACKETLENGTH.

  15. max_header_length: integer, maximum bytes in auto-generated packet header for P_MAXHEADERLENGTH.

  16. max_protocol_segments: integer, maximum number of protocol segments. For PS_HEADERPROTOCOL: segments and it should be the same as C_CAPABILITIES: max_protocol_count.

  17. max_pattern_length: integer, maximum bytes in payload pattern. For PS_PAYLOAD: hex_data max length.

  18. max_modifiers: integer, maximum 16-bit modifiers per stream. For PS_MODIFIERCOUNT: modifier_count.

  19. max_modifier_bytes: integer, maximum bytes in a modified field. Fixed to 2 bytes.

  20. max_repeat: integer, maximum repeats for a modifier. For PS_MODIFIER: repetition.

  21. max_tpid: integer, maximum TPLD ID value. For PS_TPLDID: test_payload_identifier.

  22. max_manual_packets: integer, maximum manual packets. Not in use.

  23. max_match_terms: integer, max filter match terms per port. Max length of PM_INDICES: match_term_xindices, and PM_CREATE max index value.

  24. max_length_terms: integer, max filter length terms per port. Max length of PL_INDICES: length_term_xindices, and PL_CREATE max index value.

  25. max_ors: integer, max or-terms per filter.

  26. max_nots: integer, max or-terms with nots per filter.

  27. max_filters: integer, max filters per port. Max length of PF_INDICES: filter_xindices, and PF_CREATE max index value.

  28. max_captured_packets: integer, max captured packets at one time. PC_STATS: packets max value

  29. max_tpld_stats: integer, max number of different TPLDs for RX statistics. Max TPLD index a RX port can handle.

  30. max_histogram: integer, max number of sampled histograms. Max length of PD_INDICES: histogram_indices, and PD_CREATE max index value.

  31. max_32bit_modifiers: integer, max 32-bit modifiers per stream. Max value of PS_MODIFIEREXTCOUNT: ext_modifier_count.

  32. can_set_autoneg: integer, whether supports auto negotiation. For P_AUTONEGSELECTION, and it tells whether the port is a RJ45 port or not.

  33. can_tcp_checksum: integer, whether supports TCP with valid checksum. PS_HEADERPROTOCOL: segments = TCPCHECK supported or not.

  34. can_udp_checksum: integer, whether supports UDP with valid checksum. PS_HEADERPROTOCOL: segments = UDPCHECK supported or not.

  35. can_eee: integer, whether supports Energy Efficient Ethernet. Corresponds to whether the following commands are supported: P_LPSUPPORT, P_LPRXPOWER, P_LPSNRMARGIN, P_LPPARTNERAUTONEG, P_LPSTATUS, P_LPTXMODE, and P_LPENABLE.

  36. can_hw_reg_access: integer, whether supports hardware register access. Corresponds to whether PX_RW is supported.

  37. can_tcvr_mii_reg_access: integer, whether supports transceiver MII access. Corresponds to whether PX_MII is supported.

  38. can_adv_phy_man: integer, whether supports advanced PHY management. Corresponds to whether the following commands are supported: PP_PHYTXEQ, PP_PHYRXEQ, PP_PHYRETUNE, PP_PHYAUTOTUNE, and PP_PHYSIGNALSTATUS.

  39. can_micro_tpld: integer, whether supports micro TPLD. Whether P_TPLDMODE: mode = MICRO is supported.

  40. can_mdi_mdix: integer, whether supports MDI/MDIX. Whether P_MDIXMODE is supported.

  41. can_payload_mode: integer, whether supports payload mode. Whether P_PAYLOADMODE is supported.

  42. can_custom_data_fields: integer, whether supports custom data fields. Whether P_PAYLOADMODE: mode = CDF is supported.

  43. can_ext_payload: integer, whether supports extended payload. Whether P_PAYLOADMODE: mode = EXTPL is supported.

  44. can_dyn_traffic_change: integer, hether supports dynamic traffic change. Whether P_DYNAMIC: on_off = ON is supported.

  45. can_sync_traffic_start: integer, whether supports synchronized traffic start. Whether C_TRAFFICSYNC and C_TRAFFIC are supported or not.

  46. can_pfc: integer, whether supports Priority Flow Control. Whether P_PFCENABLE is supported.

  47. can_pcs_pma_config: integer, whether this port can provide PCS/PMA configuration and status. Corresponds to whether the following commands are supported: PP_TXLANEINJECT, PP_TXERRORRATE, PP_TXLANECONFIG, PP_PRBSCONFIG, and PP_PHYSETTINGS.

  48. can_fec: integer, bitmask. for PP_FECMODE.

Bit 0: RS-FEC KR
Bit 1: RS-FEC KP
Bit 2: FC FEC
Bit 3: RS-FEC INT
Bit 31: Mandatory

Important

Bit [0] and [1] are mutually exclusive.

If [31] is set, the port does not support OFF.

If [0] is set, the port supports ON, and supposedly RS_FEC and RS_FEC_KR.

If [1] is set, the port supports ON, and supposedly RS_FEC and RS_FEC_KP.

If [2] is set, the port supports FC_FEC.

If [3] is set, the port supports RS_FEC_INT

  1. can_fec_stats: integer, can this port provide advanced FEC stats of type x? [0] = symbol error distribution. For PP_RXTOTALSTATS.

  2. can_tx_eq: integer, whether supports TX EQ settings PP_PHYTXEQ.

  3. can_rx_retune: integer, whether supports RX retuning PP_PHYRETUNE.

  4. prbs_types_supported: integer, bitmask, type of PRBS supported. For PP_PRBSTYPE: prbs_inserted_type.

Bit 0: Lane-based
Bit 1: PHY-based
Bit 2-31: Reserved

See also

Detailed explanation in Explanation of prbs_types_supported

  1. prbs_inversions_supported: integer, bitmask, for PP_PRBSTYPE: invert

Bit 0: Lane-based supports invert
Bit 1: PHY-based supports invert
Bit 2-31: Reserved

  1. prbs_polys_supported: integer list, bit map for each PRBS type. For PP_PRBSTYPE: polynomial.

See also

Detailed explanation in Explanation of prbs_polys_supported

  1. serdes_count: integer, number of physical serdes on line-side.

  2. lane_count: integer, number of lanes (virtual).

  3. tx_eq_tap_count: integer, number of TXEQ taps.

  4. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  5. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  6. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  7. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  8. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  9. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  10. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  11. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  12. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  13. tx_eq_tap_max_val: integer, max value of individual TXEQ tap.

  14. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  15. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  16. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  17. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  18. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  19. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  20. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  21. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  22. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

  23. tx_eq_tap_min_val: integer, min value of individual TXEQ tap.

Note

This table shows the meaning of #58 to #77 based on the module type and modulation.

#

Z800 Freya (112G serdes)

Z400 Thor (56G serdes, PAM4)

Z400 Thor (56G serdes, NRZ)

Z100 Loki (28G serdes, NRZ)

58

max value of pre

max value of pre

max value of pre

max value of pre

59

max value of main

max value of main

max value of main

max value of main

60

max value of post

max value of post

max value of post

max value of post

61

max value of pre2

max value of pre2

max value of pre2

0

62

max value of pre3

max value of post2

max value of post2

0

63

0

max value of post3

max value of post3

0

64

0

0

0

0

65

0

0

0

0

66

0

0

0

0

67

0

0

0

0

68

min value of pre

min value of pre

min value of pre

min value of pre

69

min value of main

min value of main

min value of main

min value of main

70

min value of post

min value of post

min value of post

min value of post

71

min value of pre2

min value of pre2

min value of pre2

0

72

min value of pre3

min value of post2

min value of post2

0

73

0

min value of post3

min value of post3

0

74

0

0

0

0

75

0

0

0

0

76

0

0

0

0

77

0

0

0

0

  1. max_fec_correctable_symbol_count: integer, max number of symbols correctable by the current FEC.

  2. max_xmit_one_packet_length: integer, maximum size (in bytes) of packets, which can be sent using P_XMITONE (replay/streaming interface). For P_XMITONE: hex_data length.

  3. tx_runt_packet_min_length: integer, minimum TX packet size supported by runt block. Zero = not supported. For P_TXRUNTLENGTH: runt_length.

  4. rx_runt_packet_min_length: integer, minimum RX packet size supported by runt block. Zero = not supported. For P_RXRUNTLENGTH: runt_length.

  5. can_manipulate_preamble: integer, whether this port can manipulate the preamble. Whether P_TXPREAMBLE_REMOVE and P_RXPREAMBLE_INSERT are supported.

  6. can_set_link_train: integer, whether this port can set link training PP_LINKTRAIN.

  7. can_link_flap: integer, whether this port supports link flap. Whether PP_LINKFLAP_ENABLE and PP_LINKFLAP_PARAMS are supported.

  8. can_auto_neg_base_r: integer, whether the port currently can perform BASE-R autonegotiation (as opposed to RJ45 BASE-T). Whether PP_AUTONEG is supported.

  9. can_pma_error_pulse: integer, whether this port supports PMA pulse error injection. Whether PP_PMAERRPUL_ENABLE and PP_PMAERRPUL_PARAMS are supported.

  10. is_chimera: integer, whether this is a E100 Chimera port.

  11. has_p2p_loop_partner: integer, whether this port currently has a port-to-port loop partner. Whether P_LOOPBACK: mode = PORT2PORT is supported.

  12. p2p_loop_partner: integer, The port-to-port loop partner for the port. -1 means N/A. If this is -1, P_LOOPBACK: mode cannot be PORT2PORT.

  13. traffic_engine: integer, the enabled traffic engine on port. 1 = TGA, 2 = uTGA (micro TGA).

  14. reconc_sublayer: integer, the Reconciliation Sublayer support

  • NO_SUPPORT = 0

  • FAULT_SIGNALING = 1, which means P_FAULTSTATUS and P_FAULTSIGNALLING are supported by the port.

  1. max_match_term_pos: integer, max match term position in bytes

  2. stream_misc: integer, bitmask, what streams on this port can do.

Bit 0: Whether the port supports streams with DEC8/INC16/DEC16 payload.
Bit 1: Whether the port supports ``INCPLDFROM0`` stream option (refer to the ``PS_OPTIONS`` command).

  1. rxeq_cap_ctle_low_min: integer, min value of CTLE LOW.

  2. rxeq_cap_ctle_high_min: integer, min value of CTLE HIGH.

  3. rxeq_cap_agc_min: integer, min value of Automatic Gain Control.

  4. rxeq_cap_oc_min: integer, min value of Offset Cancellation.

  5. rxeq_cap_cdr_min: integer, min value of CDR, always 0.

  6. rxeq_cap_ffe_pre1_min: integer, min value of FFE Pre 1.

  7. rxeq_cap_ffe_pre2_min: integer, min value of FFE Pre 2.

  8. rxeq_cap_ffe_pre3_min: integer, min value of FFE Pre 3.

  9. rxeq_cap_ffe_pre4_min: integer, min value of FFE Pre 4.

  10. rxeq_cap_ffe_pre5_min: integer, min value of FFE Pre 5.

  11. rxeq_cap_ffe_pre6_min: integer, min value of FFE Pre 6.

  12. rxeq_cap_ffe_pre7_min: integer, min value of FFE Pre 7.

  13. rxeq_cap_ffe_pre8_min: integer, min value of FFE Pre 8.

  14. rxeq_cap_dfe_min: integer, min value of DFE, always 0.

  15. rxeq_cap_ffe_post1_min: integer, min value of FFE Post 1.

  16. rxeq_cap_ffe_post2_min: integer, min value of FFE Post 2.

  17. rxeq_cap_ffe_post3_min: integer, min value of FFE Post 3.

  18. rxeq_cap_ffe_post4_min: integer, min value of FFE Post 4.

  19. rxeq_cap_ffe_post5_min: integer, min value of FFE Post 5.

  20. rxeq_cap_ffe_post6_min: integer, min value of FFE Post 6.

  21. rxeq_cap_ffe_post7_min: integer, min value of FFE Post 7.

  22. rxeq_cap_ffe_post8_min: integer, min value of FFE Post 8.

  23. rxeq_cap_ffe_post9_min: integer, min value of FFE Post 9.

  24. rxeq_cap_ffe_post10_min: integer, min value of FFE Post 10.

  25. rxeq_cap_ffe_post11_min: integer, min value of FFE Post 11.

  26. rxeq_cap_ffe_post12_min: integer, min value of FFE Post 12.

  27. rxeq_cap_ffe_post13_min: integer, min value of FFE Post 13.

  28. rxeq_cap_ffe_post14_min: integer, min value of FFE Post 14.

  29. rxeq_cap_ffe_post15_min: integer, min value of FFE Post 15.

  30. rxeq_cap_ffe_post16_min: integer, min value of FFE Post 16.

  31. rxeq_cap_ffe_post17_min: integer, min value of FFE Post 17.

  32. rxeq_cap_ffe_post18_min: integer, min value of FFE Post 18.

  33. rxeq_cap_ffe_post19_min: integer, min value of FFE Post 19.

  34. rxeq_cap_ffe_post20_min: integer, min value of FFE Post 20.

  35. rxeq_cap_ffe_post21_min: integer, min value of FFE Post 21.

  36. rxeq_cap_ffe_post22_min: integer, min value of FFE Post 22.

  37. rxeq_cap_ffe_post23_min: integer, min value of FFE Post 23.

  38. reserved: integer, reserved.

  39. reserved: integer, reserved.

  40. reserved: integer, reserved.

  41. reserved: integer, reserved.

  42. reserved: integer, reserved.

  43. reserved: integer, reserved.

  44. reserved: integer, reserved.

  45. reserved: integer, reserved.

  46. reserved: integer, reserved.

  47. reserved: integer, reserved.

  48. rxeq_cap_ctle_low_max: integer, max value of CTLE LOW.

  49. rxeq_cap_ctle_high_max: integer, max value of CTLE HIGH.

  50. rxeq_cap_agc_max: integer, max value of Automatic Gain Control.

  51. rxeq_cap_oc_max: integer, max value of Offset Cancellation.

  52. rxeq_cap_cdr_max: integer, max value of CDR, always 0.

  53. rxeq_cap_ffe_pre1_max: integer, max value of FFE Pre 1.

  54. rxeq_cap_ffe_pre2_max: integer, max value of FFE Pre 2.

  55. rxeq_cap_ffe_pre3_max: integer, max value of FFE Pre 3.

  56. rxeq_cap_ffe_pre4_max: integer, max value of FFE Pre 4.

  57. rxeq_cap_ffe_pre5_max: integer, max value of FFE Pre 5.

  58. rxeq_cap_ffe_pre6_max: integer, max value of FFE Pre 6.

  59. rxeq_cap_ffe_pre7_max: integer, max value of FFE Pre 7.

  60. rxeq_cap_ffe_pre8_max: integer, max value of FFE Pre 8.

  61. rxeq_cap_dfe_max: integer, max value of DFE, always 0.

  62. rxeq_cap_ffe_post1_max: integer, max value of FFE Post 1.

  63. rxeq_cap_ffe_post2_max: integer, max value of FFE Post 2.

  64. rxeq_cap_ffe_post3_max: integer, max value of FFE Post 3.

  65. rxeq_cap_ffe_post4_max: integer, max value of FFE Post 4.

  66. rxeq_cap_ffe_post5_max: integer, max value of FFE Post 5.

  67. rxeq_cap_ffe_post6_max: integer, max value of FFE Post 6.

  68. rxeq_cap_ffe_post7_max: integer, max value of FFE Post 7.

  69. rxeq_cap_ffe_post8_max: integer, max value of FFE Post 8.

  70. rxeq_cap_ffe_post9_max: integer, max value of FFE Post 9.

  71. rxeq_cap_ffe_post10_max: integer, max value of FFE Post 10.

  72. rxeq_cap_ffe_post11_max: integer, max value of FFE Post 11.

  73. rxeq_cap_ffe_post12_max: integer, max value of FFE Post 12.

  74. rxeq_cap_ffe_post13_max: integer, max value of FFE Post 13.

  75. rxeq_cap_ffe_post14_max: integer, max value of FFE Post 14.

  76. rxeq_cap_ffe_post15_max: integer, max value of FFE Post 15.

  77. rxeq_cap_ffe_post16_max: integer, max value of FFE Post 16.

  78. rxeq_cap_ffe_post17_max: integer, max value of FFE Post 17.

  79. rxeq_cap_ffe_post18_max: integer, max value of FFE Post 18.

  80. rxeq_cap_ffe_post19_max: integer, max value of FFE Post 19.

  81. rxeq_cap_ffe_post20_max: integer, max value of FFE Post 20.

  82. rxeq_cap_ffe_post21_max: integer, max value of FFE Post 21.

  83. rxeq_cap_ffe_post22_max: integer, max value of FFE Post 22.

  84. rxeq_cap_ffe_post23_max: integer, max value of FFE Post 23.

  85. reserved: integer, reserved.

  86. reserved: integer, reserved.

  87. reserved: integer, reserved.

  88. reserved: integer, reserved.

  89. reserved: integer, reserved.

  90. reserved: integer, reserved.

  91. reserved: integer, reserved.

  92. reserved: integer, reserved.

  93. reserved: integer, reserved.

  94. reserved: integer, reserved.

  95. length_histogram_step_min: integer, minimum step size for length histograms.

  96. length_histogram_step_max: integer, maximum step size for length histograms.

  97. latency_histogram_step_min: integer, minimum step size for latency histograms.

  98. latency_histogram_step_max: integer, maximum step size for latency histograms.

  99. tcvr_i2c_min_freq_khz: integer, Minimum configurable transceiver I2C frequency in kHz. Default is 100 kHz

  100. tcvr_i2c_max_freq_khz: integer, Maximum configurable transceiver I2C frequency in kHz. Default is 100 kHz; value is either based on module HW limits or transceiver capability limits

  101. can_eyescan: integer, bitmask

Bit 0: Sampled Eyescan supported.
Bit 1: Statistical Eye Scan supported (the Z100 Loki eye-scan).

  1. layer1_misc: integer, bitmask

Bit 0: Can IEEE variant
Bit 1: Can ETC (Ethernet Consortium) PCS variant
Bit 2: Can monitor PCS RX Lane Map
Bit 3: Can control PCS TX Lane Map
Bit 4: Can monitor PCS RX Lane Skew
Bit 5: Can control PCS TX Lane Skew
Bit 6: Can FEC error injection
Bit 7: Can P/N Polarity Swap
Bit 8: Can Pre-coding
Bit 9: Can Gray-coding

  1. can_macsec: integer, if the port supports MACsec.

  2. editable_mixlength_indices: integer, bitmask

Bit 0: Is Mix length index 0 editable
Bit 1: Is Mix length index 1 editable
Bit 2: Is Mix length index 2 editable
Bit 3: Is Mix length index 3 editable
Bit 4: Is Mix length index 4 editable
Bit 5: Is Mix length index 5 editable
Bit 6: Is Mix length index 6 editable
Bit 7: Is Mix length index 7 editable
Bit 8: Is Mix length index 8 editable
Bit 9: Is Mix length index 9 editable
Bit 10: Is Mix length index 10 editable
Bit 11: Is Mix length index 11 editable
Bit 12: Is Mix length index 12 editable
Bit 13: Is Mix length index 13 editable
Bit 14: Is Mix length index 14 editable
Bit 15: Is Mix length index 15 editable

See also

Detailed explanation in Explanation of editable_mixlength_indices

  1. can_modifier_le: integer, bitmask

Bit 0: Normal modifier (16/24-bit) supports little-endian
Bit 1: Extended modifier (32-bit) supports little-endian

  1. capture_bitmask: integer, bitmask

If all bits are 0, CAPTURE_NOT_SUPPORTED

// Bits [0:11] are for Start triggers
Bit 0: CAPTURE_START_ON
Bit 1: CAPTURE_START_FCSERROR
Bit 2: CAPTURE_START_FILTER
Bit 3: CAPTURE_START_PLDERROR
Bit 4-11: Reserved

// Bits [12:23] are for Stop triggers
Bit 12: CAPTURE_STOP_FULL
Bit 13: CAPTURE_STOP_FCSERROR
Bit 14: CAPTURE_STOP_FILTER
Bit 15: CAPTURE_STOP_PLDERROR
Bit 16: CAPTURE_STOP_USERSTOP
Bit 17-23: Reserved

// Bits [24:31] are for Keep modes
Bit 24: CAPTURE_KEEP_ALL
Bit 25: CAPTURE_KEEP_FCSERR
Bit 26: CAPTURE_KEEP_NOTPLD
Bit 27: CAPTURE_KEEP_TPLD
Bit 28: CAPTURE_KEEP_FILTER
Bit 29: CAPTURE_KEEP_PLDERR
Bit 30-31: Reserved

Example

# get
input:  0/1 P_CAPABILITIES ?
prbstypessupported and prbspolyssupported explanation

Fig. 3.1 Explanation of prbs_types_supported and prbs_polys_supported

editable_mixlength_indices explanation

Fig. 3.2 Explanation of editable_mixlength_indices